✨ The Role in One Sentence

We are seeking a Verification Engineer to be responsible for system level and integration verification of designs.

📋 What You'll Likely Do

• 40%: Verify low power, multi clock domain designs and SOC level designs.

• 30%: Help RTL designers with module level functional verification.

• 30%: Develop the verification infrastructure.

🧑‍💻 Profiles Doing This Job

• High Priority: Experience in verification of multi clock domain designs.

• High Priority: Experience developing the verification infrastructure for SOC designs.

• High Priority: Experience with UVM and advanced level in Python & GIT.

📈 How This Role Will Look on Your CV

• Developed verification infrastructure for SOC designs in advanced technology nodes.